Embodiments of the inventive concept relate generally to computing devices capable of executing a program performing a method that analyzes power noise in a semiconductor device. Other embodiments of the inventive concept relate to methods of providing semiconductor device designs having more accurate power noise characterization, as well as program storage media storing program(s) performing such methods.
Contemporary semiconductor devices include a vast number of semiconductor elements that respectively and/or collectively operate in prescribed manner(s) in response to one or more applied operating voltages. Thus, the design, characterization, generation and application of various operating voltages and power voltages are important consideration in the overall design and operation of a semiconductor device. Power voltage(s) are applied to various power supply terminal(s) of a semiconductor device. These power supply voltages may then be connect to respective semiconductor elements, or groups of semiconductor elements, via a so-called power network. In like manner, various operating voltages derived from one or more power voltages may be distributed via some or all the power network. As a result, the power network constitutes a complicated power transmission path.
However, the power network (or power transmission path taken as a whole or in various portions) may be understood as having an electrical resistance. Hence, an externally provided power voltage is not directly applied to the various semiconductor elements, but is instead indirectly coupled to the semiconductor elements via a power network component having a resistance value. As a result, some non-zero drop in an applied power voltage will occur as the result of being connected to the semiconductor elements via the power network. Under certain operating conditions, it is possible that a power voltage applied to semiconductor elements may drop to the point where normal operation of the semiconductor device is not ensured. Hereafter, a dropped voltage resulting from the foregoing phenomenon will be referred to as ‘power noise’. Given the narrowing margins and decreasing amplitudes of power voltages and operating voltages variously applied in contemporary semiconductor devices, it is increasingly important to accurately model or analyze power noise during the design of a semiconductor device.